Verified 2026-10

MCP4725 Breakout Board - 12-Bit DAC with I2C Interface

A single-channel 12-bit I2C DAC: write a value over I2C and VOUT swings rail-to-rail from 0 V to VIN, with an EEPROM that restores the last output after a power cycle and an A0 pad that moves the address between 0x62 and 0x63 so two boards can share a bus.

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Logic level3.3 V

Pinout

6 pads, as the vendor numbers them.

#	Name	Function	Signals
1	VIN	Supply, 2.7-5.5 V; also sets the top of the output range. The fab file names this net VCC while the silkscreen prints VIN	supply, output reference
2	GND	Common ground for power, logic and the DAC output	ground
3	SCL	I2C clock, level-shifted for 3-5 V logic, 10 kOhm pull-up on the board	I2C SCL, input
4	SDA	I2C data, level-shifted for 3-5 V logic, 10 kOhm pull-up on the board	I2C SDA, bidirectional
5	A0	Address select: leave open (or jumper open) for 0x62, tie high or close the ADDR jumper on the back for 0x63	address select, input
6	VOUT	DAC output, rail-to-rail 0 V to VIN. Also available on the optional terminal block's pin 2	analog output

Buses

Bus	Signals	Pins	Voltage	Note
I2C ×1	SDA, SCL	SDA, SCL

I²C / bus addresses

Address	Bus	Device	Note
0x62	I2C	MCP4725 12-bit DAC	7-bit, default with A0 low/open. Tying A0 high or closing the ADDR jumper on the back gives 0x63, which is how two of these share one bus.

Power

Input	2.7-5.5 V on VIN; the output range is proportional to this rail (3.3 V in gives 0-3.3 V out, 5 V in gives 0-5 V out)
Input range	2.7-5.5 V

SCL and SDA are level-shifted on the board, so 3-5 V logic is fine regardless of the supply, and both carry 10 kOhm pull-ups. Adafruit publishes no board-level current draw and no board dimensions for this revision, so neither is recorded. The chip supports 3.4 Mbps Fast Mode I2C, which the board carries through, but the vendor notes Arduino hosts cannot reach that rate.

Notes

Pin numbers 1-6 are the fab file's JP1 pads in silkscreen order (VIN, GND, SCL, SDA, A0, VOUT left to right), 0.1in pitch; Adafruit prints no numbers. The optional 3.5 mm terminal block (fab file X1) is NOT included and its pads are not in that row: pin 1 is GND and pin 2 is VOUT, so a screw-terminal build has to get that polarity right, and the two holes are marked -/+ on the silkscreen. The Jan 2022 STEMMA QT revision 'changed the physical shape and pinout a little' in the vendor's words, so a pin order read off an older non-QT MCP4725 board is not this board's order. The Aug 2023 revision is silkscreen-only.

Provenance

Every figure on this page was read from the 3 sources below and last checked on Oct 18, 2026.