arduino SAM-M8Q MKR GPS Shield

AI context

Dense context for pasting into a model prompt — addresses, pinout, voltages, tolerances and the vendor's reference circuit.

PART: Arduino MKR GPS Shield (SKU ASX00017), an MKR-format shield built around one u-blox SAM-M8Q GNSS patch-antenna module in a 20-pad LGA land grid array. The module carries its own embedded RHCP patch antenna (3 dBiC peak gain), TCXO, SAW filter and LNA, and tracks GPS, GLONASS and Galileo concurrently. The board adds nothing but power routing, a 5-pin sensor cable connector, a backup battery holder and six solder jumpers.
PINOUT: the shield carries two 14-pin MKR headers, J1 and J2, each numbered 1-14 by the vendor; this entry offsets J2 to 15-28 so every pad number is unique, and names the connector pad in every description. J1 (pads 1-14) is drawn with no net on any pad - all fourteen are pass-through only. J2: pad 1 (entry 15) TP = module TIMEPULSE 1 PPS (U1 pad 7), pad 2 (16) EXTINT = U1 pad 19 EXTINT0, pad 3 (17) SAFEBOOT_N = U1 pad 8, pad 8 (22) TXD = U1 pad 13 TxD, pad 9 (23) RXD = U1 pad 14 RxD, pad 10 (24) RESET_N = U1 pad 18, pad 11 (25) GND, pad 12 (26) +3V3. J2 pads 4, 5, 6, 7, 13 and 14 carry no net at all - including the MKR +5V pad, which this shield does not use. J3, the 5-pin wire sensor connector, is offset to 29-33: 1 (29) +5V, 2 (30) EXTINT, 3 (31) SCL, 4 (32) SDA, 5 (33) GND. Module pads per the data sheet: 1 GND, 2 VCC_IO, 3 V_BCKP, 4-6 GND, 7 TIMEPULSE, 8 SAFEBOOT_N, 9 SDA, 10-11 GND, 12 SCL, 13 TxD, 14 RxD, 15-16 GND, 17 VCC, 18 RESET_N, 19 EXTINT0, 20 GND.
SUPPLY: the module's VCC is diode-ORed from two sources through a pair of SDM40E20LC-7 Schottky diodes, D1 from the MKR +3V3 pad (J2 pad 12) and D2 from a local regulator. U2 is an AP2112K-3.3 fed from the +5V rail, which reaches the board only on J3 pad 1, the sensor cable connector; C1 is 1 uF on that input, C2 1 uF on the regulator output, C3 100 nF at the module. So plugged onto an MKR board the shield runs from the host's 3.3 V rail, and standalone over the sensor cable it runs from 5 V. Module data sheet: VCC 2.7 V min, 3.0 V typical, 3.6 V max; VCC_IO 2.7-3.6 V, and VCC_IO must not exceed VCC + 0.3 V when VCC is above 3.3 V. Current: 67 mA maximum, 32 mA average acquisition (25 mA GPS only), 29 mA average tracking (23 mA GPS only), 9.5 mA in 1 Hz power-save mode, all at 3.0 V.
LOGIC: 3.3 V. Digital inputs switch at 0.7 x VCC_IO high and 0.2 x VCC_IO low; an input may sit anywhere from 0 V to VCC_IO + 0.5 V. Absolute maximum is -0.5 V to VCC_IO + 0.5 V on any input pin and 10 mA through any digital I/O pin; the module is not protected against overvoltage or reversed supply, so any spike above 3.6 V must be clamped externally. Operating and storage range is -40 to +85 C. EXTINT has fixed thresholds referenced to VCC_IO, so it cannot accept a 5 V pulse.
REFERENCE CIRCUIT: R4, 100 kOhm, pulls the module's RESET_N up to the VCC rail on this board, on top of the module's own internal 11 kOhm pull-up on pad 18. The backup domain is a battery holder (BATT) feeding V_BCKP (pad 3) with C4, 100 nF, to ground; V_BCKP takes 1.4 V to 3.6 V and draws 15 uA at 1.8 V with VCC at 0 V, which is what keeps the RTC and the battery-backed configuration alive. R1 and R2 are marked DNP (not fitted). The board fits no pull-up resistors on SDA or SCL - the DDC bus relies on the host's pull-ups.
BUSES: one UART (NMEA 0183 and UBX, both directions, on J2 pads 22/23) and one DDC interface that is I2C-compatible, slave only, up to 400 kHz, on SCL/SDA. The DDC lines reach only J3 (pads 31/32), never the MKR header, because J2 pads 4-7 carry no net. No I2C address is printed in the data sheet this entry cites, so none is recorded here.
TRAPS: (1) I2C is available only on J3 pads 3 and 4 - the MKR header's D11/D12 pads are not connected to the module on this shield. (2) Header row J1 is entirely unconnected: all fourteen pads are pass-through. (3) The MKR +5V pad is unconnected; the shield takes +3V3 from the header or 5 V from J3. (4) Each of the six used header signals passes through a two-pad solder jumper; the schematic draws all six open - two separate pads with a gap and no bridge - so check the physical board before assuming the header reaches the module. (5) SAFEBOOT_N (pad 8) is listed as 'Reserved' in the data sheet, but the same document requires the UART and SAFEBOOT_N to stay accessible for service and firmware updates. (6) The embedded antenna needs roughly a 50 x 50 mm ground plane to reach its specified radiation pattern; on a narrower board the gain and efficiency drop and the vendor says so. (7) TIMEPULSE is 1 PPS by default and is a 3.3 V output - do not feed it into a 5 V-only input expecting a square wave above VCC_IO.