m5stack ST25R3916 NFC Universal Unit

AI context

Dense context for pasting into a model prompt — addresses, pinout, voltages, tolerances and the vendor's reference circuit.

PART: M5Stack Unit NFC, SKU U216, a 48.0 x 24.0 x 8.0 mm (5.9 g) 13.56 MHz NFC reader built on an ST25R3916-AQWT (U1, 33 pads including EPAD: VDD_IO 1, CSO 2, VDD_D 3, XTO 4, XTI 5, GND 6, VDD_A 7, VDD 8, VDD_RF 9, VDD_TX 10, VDD_AM 11, GND 12, RFO1 13, VDD_DR 14, RFO2 15, GND 16, EXT_LM 17, AAT_A 18, AAT_B 19, I2C_EN 20, VSS 21, RFI1 22, RFI2 23, AGDC 24, CSI 25, GND 26, IRQ 27, MCU_CLK 28, BSS 29, SCLK 30, MOSI 31, MISO 32, EPAD 33).
ADDRESSES: I2C 0x50 at 100 kHz or 400 kHz, per the vendor's specification table and PinMap line. No alternative address is published and no strap is drawn, so one unit per bus.
PINOUT: one HY2.0-4P socket, PORT.A: pad 1 GND (Black), 2 5V (Red), 3 SDA (Yellow), 4 SCL (White), per the vendor's docs colour table. The schematic's own J1 'Grove' symbol prints the opposite order on its pads (SCL 1, SDA 2, 5V 3, GND 4) - both are recorded, neither is resolved; trust the colour table and the cable, not the schematic pin numbers.
SUPPLY: 5 V on pad 2, dropped to 3.3 V by U3 TPAP7343D-33FS4 (VIN 4, EN 3, VOUT 1, EP 5) for VCC_3V3, with C29 and C30 1 uF on the rail. The RF front end is fed from the same 3.3 V through an eight-way decoupling stack - C31/C15/C17/C19/C21/C23/C25/C27 at 10 nF paired with C32/C16/C18/C20/C22/C24/C26/C28 at 10 uF - plus C14 and C12 6.0 pF, C13/C1 220 pF, C4/C9 150 pF, C5/C7 680 pF, C6/C8 180 pF, C11/C2 10 pF (C3 and C10 are NC) across the antenna network. Measured current: 19.33 uA sleeping, 19.79 uA powered but unconfigured, 67.65 mA continuous reading, 66.48 mA intermittent reading, all at 5 V.
LOGIC: I2C at 3.3 V (VCC_3V3). No level shifting on the connector, and the field is generated from the same rail, so the unit cannot be run from a 5 V bus without a shifter.
CIRCUIT: R3 and R4 are 2.2 kOhm pull-ups on SCL and SDA to VCC_3V3, fitted. R1 and R2 are 2.4 ohm series resistors into the antenna matching network, L1 and L2 are 270 nH 5% inductors, and the crystal X1 is 27.12 MHz with CL 20 pF. The antenna is drawn as ANT_NFC (ANT1_P / ANT1_N) with RFI_P / RFI_N as the receive pair.
TRAPS: (1) The data sheet is ST's own ST25R3916 document, and it is the only one linked - the schematic's U1 is ST25R3916-AQWT, the -AQWT being the package/grade suffix. (2) Two of the matching capacitors (C3, C10) are marked NC, so the antenna network is not the data sheet's full reference circuit - do not copy it and expect the same tuning. (3) The docs' colour table and the schematic's J1 pad numbering disagree on pin order. (4) LEGO-compatible holes are drilled through the board, not at the edge, so keep copper clear around them.