pimoroni PiCowBell HSTX DVI Output for Pico - Works with HDMI Displays

AI context

Dense context for pasting into a model prompt — addresses, pinout, voltages, tolerances and the vendor's reference circuit.

BOARD: Adafruit 6363, a PiCowbell carrier that sits under a Raspberry Pi Pico and turns it into a DVI video source. It carries no silicon of its own - the transmitter is the RP2350's High Speed Transmit Interface (HSTX) peripheral inside the Pico 2 or Pico 2 W, which is why the board works with those two and not with a Pico 1 - plus a mini HDMI connector at one end, a STEMMA QT socket at the other, a four-hole USB host breakout, three extra HDMI pins, a reset button and a slide switch. The Pico itself is not included and is soldered or socketed on top, which is why this entry has no headline part.
ADDRESSES: no device answers on this board - it is connectors and passives. The SDA/SCL pads and the STEMMA QT socket share GPIO4 and GPIO5 of the Pico, so whatever I2C device is plugged into the QT socket is the only thing a scan finds.
PINOUT: 40 pads, numbered as the Raspberry Pi Pico's own physical pins 1-40, because the PiCowbell header is the Pico socket hole for hole: 1 GP0, 2 GP1, 3 GND, 4 GP2, 5 GP3 (slide switch Sw), 6 SDA/GPIO4, 7 SCL/GPIO5, 8 GND, 9 D+ (GPIO6), 10 D- (GPIO7), 11 GP8, 12 GP9, 13 GND, 14 GP10, 15 GP11, 16 D0+ (GPIO12), 17 D0- (GPIO13), 18 GND, 19 CLK+ (GPIO14), 20 CLK- (GPIO15), 21 D2+ (GPIO16), 22 D2- (GPIO17), 23 GND, 24 D1+ (GPIO18), 25 D1- (GPIO19), 26 GP20, 27 GP21, 28 GND, 29 GP22, 30 R (RUN), 31 A0 (GPIO26), 32 A1 (GPIO27), 33 GND, 34 A2 (GPIO28), 35 VR (ADC_VREF), 36 3V, 37 EN (3V3_EN), 38 GND, 39 VS (VSYS), 40 VB (VBUS). Off the 40-pin run there are three more HDMI-side holes - Util on HDMI pin 17, CEC on HDMI pin 14, HotPlug on HDMI pin 19 - and a four-hole USB host group whose 5V is tied to VSYS, D- to GPIO7, D+ to GPIO6 and G to GND.
SUPPLY: no regulator on the board. VB is VBUS from the Pico's own USB port, nominally 5 V; VS is VSYS, which the guide gives as 1.8 V to 5.5 V and which is the rail the USB host's 5V hole is fed from; 3V and VR are outputs taken from the Pico. EN is Pico 3V3_EN, held to VSYS through a 100 kOhm resistor.
LOGIC LEVEL: 3.3 V throughout, because every pin on the header is the Pico's own pin at the Pico's own level. Nothing on the board shifts level or buffers a line; the HDMI side is driven directly from GPIO12-19 by the RP2350's HSTX blocks. No absolute maximum is published for the header beyond the Pico's own, which is 3.3 V on any GPIO with VSYS at its maximum.
REFERENCE CIRCUIT: nothing to add or fit. The only stated components are the 100 kOhm pull-up from EN to VSYS and the solder jumpers described below. The USB host port is wired straight through to GPIO6 and GPIO7 with no series parts and no host controller - the firmware has to provide PIO-based USB host, and 5 V is taken from VSYS, not switched.
TRAPS: the TDMS lane order is not the order the PCB silkscreen suggests - the connector carries D0 on GPIO12/13, the clock on GPIO14/15, D2 on GPIO16/17 and D1 on GPIO18/19, so a bit-banged or PIO DVI driver written for a different lane assignment comes out as garbage colours. GP3 is committed to the slide switch by default; cut the Switch jumper on the back to use it as a GPIO (switch up toward A2 reads low, down toward SCL reads high). The guide lists duplicate solder-jumper holes beside GP0-GP13, GP18-GP22, Reset, A0-A2, VR, 3V, EN, VS and VB - so GP14, GP15, GP16, GP17 and GP19 have no duplicate, and those five are the ones that need rework if the HSTX lane map has to change. CEC, Util and HotPlug are broken out as bare holes with no level shifting, so driving CEC from a 3.3 V pin is outside the HDMI spec's 5 V bus. This board does nothing on a Pico 1 - HSTX is an RP2350 peripheral.