Verified 2026-10

Seeed Studio Grove Base for XIAO - with embedded battery management chip

Grove carrier for the 14-pin XIAO: 8 Grove connectors (two I2C, one UART), all 14 XIAO pins broken out on two 7-pin female headers, on-board 3.7 V Li-ion charging with a power switch and charge indicator, and a reserved SOIC-8 SPI-flash footprint; 25 x 39 mm once the break-off tabs are snapped.

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Logic level3.3 V

Pinout

14 pads, as the vendor numbers them.

#	Name	Function	Signals
1	D0	Goes to a Grove connector's first signal pin (A0/D0)	GPIO, A0
2	D1	Goes to a Grove connector and to the reserved flash footprint's /CS	GPIO, A1, SPI flash chip select
3	D2	Goes to a Grove connector's second signal pin	GPIO, A2
4	D3	Goes to a Grove connector's second signal pin	GPIO, A3
5	D4	I2C data — both I2C Grove connectors	GPIO, A4, I2C SDA
6	D5	I2C clock — both I2C Grove connectors	GPIO, A5, I2C SCL
7	D6	UART transmit — Grove UART connector	GPIO, A6, UART TX
8	D7	UART receive — Grove UART connector	GPIO, A7, UART RX
9	D8	SPI clock to the reserved flash footprint and a Grove connector	GPIO, A8, SPI SCK
10	D9	SPI data in from the reserved flash footprint and a Grove connector	GPIO, A9, SPI MISO
11	D10	SPI data out to the reserved flash footprint	GPIO, A10, SPI MOSI
12	3V3_OUT	3.3 V rail, fed to pin 3 of every Grove connector	3.3 V rail
13	GND	Ground
14	VBUS	5 V from the XIAO's USB-C

Buses

Bus	Signals	Pins	Voltage	Note
I2C ×2	SDA, SCL	D4, D5	3.3 V	both I2C Grove connectors carry SCL on D5/A5 and SDA on D4/A4
UART ×1	TX, RX	D6, D7	3.3 V	Grove UART connector: RX on D7, TX on D6
SPI ×1	SCK, MISO, MOSI	D8, D9, D10	3.3 V	no single Grove connector carries all three: the SPI trio is split between two Grove connectors (SCK + MISO on one, MISO + MOSI on the other) and the reserved SOIC-8 flash footprint, whose chip select is on D1/A1

Power

Input	5 V through the XIAO, or a 3.7 V Li-ion battery (Seeed's docs describe battery bonding pads; the current schematic shows a 2-pin connector)
Input range	5 V or 3.7 V

Seeed's two documents for this board disagree and both are live: the wiki spec table says 500 mA (max) charging current and a 3.3 V operating voltage, the product PDF says 400 mA (max) and 5 V / 3.7 V. Load capacity is quoted as 800 mA.

Outputs

Rail	Rating	Note
3V3	3.3 V	pin 3 of every Grove connector

Notes

Pin numbers 1-14 are the two 7-pin female header positions that accept a XIAO board; the board carries no MCU of its own, so nothing here is a bus address — Seeed publishes I2C*2 / UART*1 Grove connectors and a load capacity but no on-board I2C device. The header order is the XIAO's own: one row is D0-D6, the other reads D7, D8, D9, D10, 3V3, GND, VBUS. Its reserved SPI-flash footprint is SOIC-8 and needs PIN1 soldered; the current schematic names a 32 Mbit ZB25VQ32DSJG. The 2025-11-19 revision swapped the charger from ETA6003 to BQ24070.

Provenance

Every figure on this page was read from the 4 sources below and last checked on Oct 15, 2026.