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Verified 2026-10

ADS1015 12-Bit ADC - 4 Channel with Programmable Gain Amplifier

The same four-channel I2C ADC breakout as the ADS1115 but with the 12-bit chip: 4 single-ended or 2 differential inputs at 128 SPS to 3.3 kSPS, PGA ranges from +/-0.256 V to +/-6.144 V, 2-5 V supply and logic with no shifter or regulator, addresses 0x48/0x49 available on board, STEMMA QT on both sides and a loose 0.1in header - $5 less than the 16-bit board for a sixteenth of the resolution (3 mV per bit against 0.1875 mV on the same range) and 3.8x the sample rate.

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Logic level3.3 V

Specs

MCUTexas Instruments ADS1015 (10-pin MSOP/VSSOP package on the board)
I/O4 analog

4 single-ended or 2 differential channels through one multiplexer; A0-A3 are the only analogue pads. No digital I/O and no PWM on the breakout.

Pinout

12 pads, as the vendor numbers them.

#NameFunctionSignals
1A+ADC analogue supply (net AVDD) - VIN through ferrite FB3, decoupled by C1 10 uF and C5 0.1 uF. An output from the board's filter, not a supply inputanalogue rail, output
2A3Analogue input 3, single-ended against GND or the negative half of a differential pairanalogue input, AIN3
3A2Analogue input 2, single-ended against GND or the negative half of a differential pairanalogue input, AIN2
4A1Analogue input 1, single-ended against GND or the negative half of a differential pairanalogue input, AIN1
5A0Analogue input 0, single-ended against GND or the negative half of a differential pairanalogue input, AIN0
6A-ADC analogue ground (net AGND) - digital GND through ferrite FB4. An output, not a ground to inject current intoanalogue ground, output
7VINBoard supply, 2-5 V. The fab file names this net VCC while the silk prints VIN; give it the host's logic level, since nothing on the board shifts levelssupply, logic reference
8GNDCommon ground for power and logic; also the low side of both STEMMA QT socketsground
9SCLI2C clock, with a 10 kOhm pull-up to VIN fitted on the board (R1)I2C SCL, input
10SDAI2C data, with a 10 kOhm pull-up to VIN fitted on the board (R1)I2C SDA, bidirectional
11ADDRAddress select: a 10 kOhm pull-down (R1) holds it at GND for 0x48, and the A0 solder jumper (SJ1) ties it to VIN for 0x49. Taking it to SDA or SCL gives 0x4A / 0x4B per TI, but those two are not jumpered on this boardaddress select, input
12ALRTComparator output or conversion-ready - open drain, as TI specifies, with a 10 kOhm pull-up to VIN fitted here (R1)interrupt, comparator output, conversion ready

Buses

BusSignalsPinsVoltageNote
I2C ×1SDA, SCLSDA, SCL2-5 V, referenced to VIN VTwo STEMMA QT / Qwiic JST-SH sockets (CONN3 and CONN4, one per side) sit in parallel with the header's SDA/SCL, so either socket or the header works and all three are the same two nets. 10 kOhm pull-ups to VIN are fitted (R1), so extra pull-ups are not needed; TI warns the ADDR pin is sampled continuously, so on a bus where SDA is used as an address the SDA line must be held low at least 100 ns after SCL falls.

I²C / bus addresses

AddressBusDeviceNote
0x48I2CADS1015 ADC7-bit, default with the A0 jumper open (a 10 kOhm pull-down holds ADDR low). Closing the A0 jumper ties ADDR to VIN: 0x49. TI's table 7-2 gives the full quartet - ADDR to GND 0x48, to VDD 0x49, to SDA 0x4A, to SCL 0x4B - but the board only jumpers the first two, so 0x4A/0x4B need a wire to the ADDR pad. Adafruit's guide calls this 'datasheet table 5', from an older TI revision.

Power

Input2-5 V on VIN (fab-file net VCC). Adafruit's instruction is to give it the same voltage as the host's logic level, because there is no level shifter: a 5 V-fed board puts 5 V on SCL/SDA through the on-board pull-ups
Input range2-5 V (TI: 2.0-5.5 V for the chip)
Typical draw0.15 mA

150 uA typical in continuous conversion is TI's chip figure (200 uA typ / 300 uA max under the datasheet's own 3.3 V, 8 SPS test conditions); power-down is 0.5-5 uA. Adafruit publishes no board-level draw, so that figure excludes the green power LED and the ferrite losses. The analogue rail is the same VIN through FB3, so A+ is not a separate supply and A- is not a quiet ground you can inject into.

Notes

Adafruit prints no pin numbers; the numbers here are the Eagle fab file's own pad numbers. The board carries two separate 1x6 headers and the fab file numbers each of them 1-6 (JP1 along the A+/A3/A2/A1/A0/A- edge, JP2 along the VIN/GND/SCL/SDA/ADDR/ALRT edge), so JP2's pads are offset by 6 here (pad 1 = 7 ... pad 6 = 12) to keep the numbers unique - the offset is this file's convention, not the vendor's. Silk labels come from the same fab file's tPlace text and sit exactly over their pads. Two traps the vendor states and one the file states: A+ and A- are OUTPUTS (the chip's analogue rail through ferrites FB3/FB4), not supply inputs - feed the board at VIN; there is no level shifter or regulator on this board, so SCL, SDA and the address pin all swing with VIN and the host must use the same logic level; and the back-side silk reads 'Max Analog In: VIN', because TI's absolute maximum on any AIN pin is VDD + 0.3 V, so a 5 V sensor signal on a 3.3 V-fed board is out of spec. The green power LED is on by default through the closed solder jumper SJ2 (back-side 'LED' label): cut it to save the LED current. The 0.1in header is supplied loose, not soldered. This board is the same PCB as the ADS1115 breakout, with identical nets, pads and silk layout - only the fitted IC and the silk's speed/resolution text differ ('12-bit ADC', and the back silk reads 'Max Analog In: VDD' where the ADS1115 board reads 'VIN'). Both fab files in the Adafruit repo carry U1 = 'ADS1015IDGST' - the ADS1115 board's file included - so the file cannot be used to tell which chip is fitted; the PCB artwork is the same, so the land pattern is shared either way. Adafruit's own guidance stands: 12-bit at up to 3.3 kSPS, 1 bit = 3 mV on the default +/-6.144 V range, against 0.1875 mV for the 16-bit part.

Provenance

Every figure on this page was read from the 4 sources below and last checked on Oct 20, 2026.

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