adafruit ADS1115 16-Bit ADC - 4 Channel with Programmable Gain Amplifier — pinout, I²C address, specs

Part & documents

Headline part	ADS1115
Data sheet	ADS1115 data sheet →
Source	www.adafruit.com/product/1085 →

Specs

MCU	Texas Instruments ADS1115 (10-pin MSOP/VSSOP package on the board)
I/O	4 analog

4 single-ended or 2 differential channels through one multiplexer; A0-A3 are the only analogue pads. No digital I/O and no PWM on the breakout.

Pinout

12 pads, as the vendor numbers them.

#	Name	Function	Signals
1	A+	ADC analogue supply (net AVDD) - VIN through ferrite FB3, decoupled by C1 10 uF and C5 0.1 uF. An output from the board's filter, not a supply input	analogue rail, output
2	A3	Analogue input 3, single-ended against GND or the negative half of a differential pair	analogue input, AIN3
3	A2	Analogue input 2, single-ended against GND or the negative half of a differential pair	analogue input, AIN2
4	A1	Analogue input 1, single-ended against GND or the negative half of a differential pair	analogue input, AIN1
5	A0	Analogue input 0, single-ended against GND or the negative half of a differential pair	analogue input, AIN0
6	A-	ADC analogue ground (net AGND) - digital GND through ferrite FB4. An output, not a ground to inject current into	analogue ground, output
7	VIN	Board supply, 2-5 V. The fab file names this net VCC while the silk prints VIN; give it the host's logic level, since nothing on the board shifts levels	supply, logic reference
8	GND	Common ground for power and logic; also the low side of both STEMMA QT sockets	ground
9	SCL	I2C clock, with a 10 kOhm pull-up to VIN fitted on the board (R1)	I2C SCL, input
10	SDA	I2C data, with a 10 kOhm pull-up to VIN fitted on the board (R1)	I2C SDA, bidirectional
11	ADDR	Address select: a 10 kOhm pull-down (R1) holds it at GND for 0x48, and the A0 solder jumper (SJ1) ties it to VIN for 0x49. Taking it to SDA or SCL gives 0x4A / 0x4B per TI, but those two are not jumpered on this board	address select, input
12	ALRT	Comparator output or conversion-ready - open drain, as TI specifies, with a 10 kOhm pull-up to VIN fitted here (R1)	interrupt, comparator output, conversion ready

Buses

Bus	Signals	Pins	Voltage	Note
I2C ×1	SDA, SCL	SDA, SCL	2-5 V, referenced to VIN V	Two STEMMA QT / Qwiic JST-SH sockets (CONN3 and CONN4, one per side) sit in parallel with the header's SDA/SCL, so either socket or the header works and all three are the same two nets. 10 kOhm pull-ups to VIN are fitted (R1), so extra pull-ups are not needed; TI warns the ADDR pin is sampled continuously, so on a bus where SDA is used as an address the SDA line must be held low at least 100 ns after SCL falls.

I²C / bus addresses

Address	Bus	Device	Note
0x48	I2C	ADS1115 ADC	7-bit, default with the A0 jumper open (a 10 kOhm pull-down holds ADDR low). Closing the A0 jumper ties ADDR to VIN: 0x49. TI's table 7-2 gives the full quartet - ADDR to GND 0x48, to VDD 0x49, to SDA 0x4A, to SCL 0x4B - but the board only jumpers the first two, so 0x4A/0x4B need a wire to the ADDR pad. Adafruit's guide calls this 'datasheet table 5', from an older TI revision.

Power

Input	2-5 V on VIN (fab-file net VCC). Adafruit's instruction is to give it the same voltage as the host's logic level, because there is no level shifter: a 5 V-fed board puts 5 V on SCL/SDA through the on-board pull-ups
Input range	2-5 V (TI: 2.0-5.5 V for the chip)
Typical draw	0.15 mA

150 uA typical in continuous conversion is TI's chip figure (200 uA typ / 300 uA max under the datasheet's own 3.3 V, 8 SPS test conditions); power-down is 0.5-5 uA. Adafruit publishes no board-level draw, so that figure excludes the green power LED and the ferrite losses. The analogue rail is the same VIN through FB3, so A+ is not a separate supply and A- is not a quiet ground you can inject into.

Notes

Adafruit prints no pin numbers; the numbers here are the Eagle fab file's own pad numbers. The board carries two separate 1x6 headers and the fab file numbers each of them 1-6 (JP1 along the A+/A3/A2/A1/A0/A- edge, JP2 along the VIN/GND/SCL/SDA/ADDR/ALRT edge), so JP2's pads are offset by 6 here (pad 1 = 7 ... pad 6 = 12) to keep the numbers unique - the offset is this file's convention, not the vendor's. Silk labels come from the same fab file's tPlace text and sit exactly over their pads. Two traps the vendor states and one the file states: A+ and A- are OUTPUTS (the chip's analogue rail through ferrites FB3/FB4), not supply inputs - feed the board at VIN; there is no level shifter or regulator on this board, so SCL, SDA and the address pin all swing with VIN and the host must use the same logic level; and the back-side silk reads 'Max Analog In: VIN', because TI's absolute maximum on any AIN pin is VDD + 0.3 V, so a 5 V sensor signal on a 3.3 V-fed board is out of spec. The green power LED is on by default through the closed solder jumper SJ2 (back-side 'LED' label): cut it to save the LED current. The 0.1in header is supplied loose, not soldered. Adafruit's four possible addresses come from the ADDR pin, not from four jumpers: there is one jumper, labelled A0 on the back silk next to 'I2C Addr 0x48'. TI rates the analogue inputs to VDD + 0.3 V absolute maximum, and the PGA full-scale range is a scaling setting, not an input tolerance: on a 3.3 V supply you cannot measure 5 V just by choosing the +/-6.144 V range. The 12-bit ADS1015 breakout (product 1083) is the same PCB, the same pads and the same pin map with the other chip fitted.

AI context

Dense context for pasting into a model prompt — addresses, pinout, voltages, tolerances and the vendor's reference circuit.

PART: Texas Instruments ADS1115, 16-bit delta-sigma ADC, 10-pin VSSOP, on an Adafruit breakout (product 1085).
PURPOSE: 4-channel 16-bit I2C analogue-to-digital converter with a programmable gain amplifier.

I2C ADDRESS: 7-bit 0x48 by default (10 kOhm pull-down holds ADDR low, A0 jumper open). Closing the A0 jumper ties ADDR to VIN and gives 0x49. TI also allows 0x4A (ADDR to SDA) and 0x4B (ADDR to SCL), but the board jumpers only the first two - 0x4A/0x4B require a wire onto the ADDR pad. Two devices max per board without rework.

SUPPLY: 2.0-5.5 V on VIN (chip limit); Adafruit sells it as 2-5 V. There is no regulator and no level shifter, so the supply voltage IS the logic level - SCL, SDA and ADDR all swing at VIN. Feed it the same voltage as the host MCU. Typical draw 150 uA in continuous conversion, 0.5-5 uA powered down; the green power LED adds current and is on by default (cut jumper SJ2 to remove it).

LOGIC LEVEL: equal to VIN. 3.3 V host means feed 3.3 V, not 5 V. On a 5 V feed the on-board 10 kOhm pull-ups put 5 V on SDA/SCL.

ANALOGUE INPUTS: A0-A3, four single-ended channels (measured against GND) or two differential pairs. Full-scale range is set by the PGA: +/-6.144, +/-4.096, +/-2.048, +/-1.024, +/-0.512, +/-0.256 V. The PGA range is a SCALING setting, not an input tolerance - it does not let you measure above the supply. Absolute maximum on any AIN pin is VDD + 0.3 V, so a 5 V sensor signal into a 3.3 V-fed board is out of specification, which is why the back silk reads "Max Analog In: VIN". Data rate 8-860 samples per second; 16-bit resolution.

PINOUT (pad numbers are the Eagle fab file's, 1-12 left to right around the two 1x6 headers):
1 A+  analogue rail output - VIN through ferrite FB3, decoupled by C1 10 uF and C5 0.1 uF. An OUTPUT, not a supply input.
2 A3  analogue input 3 / negative half of a differential pair
3 A2  analogue input 2
4 A1  analogue input 1
5 A0  analogue input 0
6 A-  analogue ground return through ferrite FB4. An OUTPUT, not a quiet ground to inject into.
7 VIN supply input, 2-5 V - this is where the board is powered
8 GND ground
9 SCL I2C clock, pulled up to VIN by 10 kOhm
10 SDA I2C data, pulled up to VIN by 10 kOhm
11 ADDR address select, sampled continuously - jumper to VIN for 0x49
12 ALRT open-drain alert/comparator output, needs an external pull-up

REFERENCE CIRCUIT: single I2C bus at the host's logic voltage, 10 kOhm pull-ups already fitted to VIN (no external pull-ups needed), 0.1 uF + 10 uF on the analogue rail behind FB3/FB4 ferrites, A0-A3 straight to the sensor outputs, ALRT left unconnected unless the comparator interrupt is used. Two STEMMA QT / Qwiic JST-SH sockets (CONN3, CONN4) are wired in parallel with the header's SDA/SCL, so header and either socket are the same two nets. The 0.1 in header ships loose, unsoldered. TI notes ADDR is sampled continuously, so when SDA is used for addressing the SDA line must be held low for at least 100 ns after SCL falls.

SIBLING: the ADS1015 (product 1083) is the same PCB, same pads, same pin map with the 12-bit chip fitted.

Provenance

Every figure on this page was read from the 5 sources below and last checked on Oct 20, 2026.

adafruit ADS1115 16-Bit ADC - 4 Channel with Programmable Gain Amplifier