Verified 2026-10
arduino Nano R4
43.18 x 17.78 mm 5 V Nano-form-factor board on the Renesas R7FA4M1AB3CFM (48 MHz Cortex-M4, 256 kB flash, 32 kB RAM, 8 kB EEPROM, 14-bit ADC, 12-bit DAC), with a Qwiic I2C connector on a second 3.3 V bus, an RTC with battery backup and a 6-21 V VIN input - €13.40.
Place this board on a carrier in the editor →
Part & documents
| Data sheet | Data sheet → |
|---|---|
| Source | store.arduino.cc/products/nano-r4 → |
Specs
| MCU | Renesas R7FA4M1AB3CFM#HA0 (Arm Cortex-M4 at 48 MHz with FPU, 256 kB flash, 32 kB SRAM, 8 kB data flash, 14-bit ADC, 12-bit DAC, OPAMP, RTC, CAN) |
|---|---|
| Clock | 48 MHz |
| RAM | 32 KB |
Pinout
30 pads, as the vendor numbers them.
| # | Name | Function | Signals |
|---|---|---|---|
| 1 | D13 / SCK | Analog-side header JP1 pad 1: D13 / SCK, the SPI serial clock | digital 13, SPI SCK |
| 2 | +3V3 | Analog-side header JP1 pad 2: +3V3, output of the AP2112K-3.3TRG1 regulator - it feeds the Qwiic connector, and Arduino warns the board may get very hot if more than 150 mA is drawn from it | 3.3 V rail |
| 3 | AREF | Analog-side header JP1 pad 3: AREF, the ADC's external reference input (VAREF). On this board VDD is the 5 V rail, so a 5 V logic level and a 5 V ADC full scale are the defaults | analogue reference |
| 4 | A0 | Analog-side header JP1 pad 4: A0, analogue input 0 and the 12-bit DAC output | analogue input 0, DAC output |
| 5 | A1 | Analog-side header JP1 pad 5: A1, analogue input 1 and the operational amplifier's non-inverting input | analogue input 1, OPAMP + |
| 6 | A2 | Analog-side header JP1 pad 6: A2, analogue input 2 and the operational amplifier's inverting input | analogue input 2, OPAMP - |
| 7 | A3 | Analog-side header JP1 pad 7: A3, analogue input 3 and the operational amplifier's output | analogue input 3, OPAMP out |
| 8 | A4 | Analog-side header JP1 pad 8: A4, analogue input 4 and SDA of the main I2C bus (Wire) - Arduino says not to use it as an ADC input while the bus is in use | analogue input 4, I2C SDA |
| 9 | A5 | Analog-side header JP1 pad 9: A5, analogue input 5 and SCL of the main I2C bus (Wire) - same warning as A4 | analogue input 5, I2C SCL |
| 10 | A6 | Analog-side header JP1 pad 10: A6, analogue input 6 with no digital function | analogue input 6 |
| 11 | A7 | Analog-side header JP1 pad 11: A7, analogue input 7 with no digital function | analogue input 7 |
| 12 | 5V | Analog-side header JP1 pad 12: 5V, the board's 5 V rail (USB power, or the buck converter's output when running from VIN) | 5 V rail, USB power |
| 13 | BOOT | Analog-side header JP1 pad 13: BOOT, mode selection - pulling it at reset puts the RA4M1 into its bootloader for board recovery | boot mode select |
| 14 | GND | Analog-side header JP1 pad 14: GND | ground |
| 15 | VIN | Analog-side header JP1 pad 15: VIN, the DC input, 6 V to 21 V, stepped down to 5 V by the MP2322GQH buck converter | power input |
| 16 | D12 / CIPO | Digital-side header JP2 pad 15: D12 / CIPO (controller in, peripheral out - the old MISO) | digital 12, SPI CIPO |
| 17 | D11 / COPI | Digital-side header JP2 pad 14: D11 / COPI (controller out, peripheral in - the old MOSI), PWM capable | digital 11, SPI COPI, PWM |
| 18 | D10 / CS | Digital-side header JP2 pad 13: D10 / CS, the SPI chip select, PWM capable | digital 10, SPI CS, PWM |
| 19 | D9 | Digital-side header JP2 pad 12: D9, PWM capable | digital 9, PWM |
| 20 | D8 | Digital-side header JP2 pad 11: D8 | digital 8 |
| 21 | D7 | Digital-side header JP2 pad 10: D7 | digital 7 |
| 22 | D6 | Digital-side header JP2 pad 9: D6, PWM capable | digital 6, PWM |
| 23 | D5 | Digital-side header JP2 pad 8: D5, PWM capable and the CAN receive line - an external CAN transceiver is required | digital 5, PWM, CAN RX |
| 24 | D4 | Digital-side header JP2 pad 7: D4, the CAN transmit line - an external CAN transceiver is required | digital 4, CAN TX |
| 25 | D3 | Digital-side header JP2 pad 6: D3, PWM capable | digital 3, PWM |
| 26 | D2 | Digital-side header JP2 pad 5: D2 | digital 2 |
| 27 | GND | Digital-side header JP2 pad 4: GND | ground |
| 28 | RST | Digital-side header JP2 pad 3: RST, the reset line, with a reset button on the board | reset, reset button |
| 29 | D0/RX | Digital-side header JP2 pad 2: D0/RX, the hardware UART's receive line - the same port the USB-C serial interface presents | digital 0, UART RX |
| 30 | D1/TX | Digital-side header JP2 pad 1: D1/TX, the hardware UART's transmit line, shared with the USB-C serial interface | digital 1, UART TX |
Buses
| Bus | Signals | Pins | Voltage | Note |
|---|---|---|---|---|
| I2C ×2 | SDA, SCL | A4, A5 | 5 V on A4/A5, 3.3 V on the Qwiic connector V | Two buses, no on-board device, so no addresses. The main bus is Wire on A4 (SDA) and A5 (SCL) at 5 V; the Qwiic JST-SH connector carries I2C0 as Wire1 at 3.3 V, with the level translation fitted on the board. Arduino says A4 and A5 must not be used as ADC inputs while the main bus is in use, and that both connection points can be populated at once. |
| SPI ×1 | SCK, CIPO, COPI, CS | D13/SCK, D12 / CIPO, D11 / COPI, D10 / CS | 5 V V | One SPI bus on D13 (SCK), D12 (CIPO - the old MISO name), D11 (COPI - the old MOSI name) and D10 (CS), all 5 V logic. |
| UART ×1 | TX, RX | D1/TX, D0/RX | 5 V V | One hardware UART on D0 (RX) and D1 (TX). The USB-C port is wired to the same serial interface, so a device on those pads shares the port the IDE uses. |
| CAN ×1 | CAN_TX, CAN_RX | D4, D5 | 5 V V | The RA4M1's CAN controller reaches D4 (TX) and D5 (RX), but the board carries no transceiver - an external one is required before either pad can sit on a CAN bus. |
Power
| Input | 6.0-21.0 V DC on VIN (buck-converted to 5 V by the MP2322GQH), or 4.8-5.5 V on the USB-C connector |
|---|---|
| Input range | VIN 6.0 V min, 7.0 V typ, 21.0 V max; VUSB 4.8 V min, 5.0 V typ, 5.5 V max; USB input current 500 mA max |
The RTC and its 32.768 kHz domain can be backed up from VBATT (JP2-adjacent pad, 1.6-3.6 V); the switch-over from the main supply to the backup cell happens as VCC falls through 2.09 V typical.
Outputs
| Rail | Rating | Note |
|---|---|---|
| 5V | 5 V V | The board's logic rail, from USB or from the buck converter, brought out on JP1 pad 12. A power-OR circuit selects between the two sources automatically. |
| 3.3V | 3.3 V V | AP2112K-3.3TRG1 LDO feeding the Qwiic connector, on JP1 pad 2. Arduino warns the board may become very hot if more than 150 mA is drawn from this pin. |
Notes
Arduino numbers the two headers independently: JP1 (analog side) pads 1-15 and JP2 (digital side) pads 1-15, with JP2's own numbers running 15 down to 1. Two pads numbered 1-15 in one pin list would collide, so pins[] numbers JP1 1-15 and JP2 16-30, and every description names the connector and the vendor's own pad number - the same offset convention the VS1053 entry uses for its two 1x16 headers. Labels are the 'Function' column of the datasheet's own pinout tables (4.1.1 Analog / 4.1.2 Digital), joined to the pad numbers in those same tables, so number and label come from one machine-readable source rather than from a picture. The board's own datasheet is the vendor document linked in datasheet_url; the silicon's document is Renesas' RA4M1 series documentation, which Arduino links rather than mirrors, and no figure here is quoted from it. 14 digital I/O, 8 analog channels, 43.18 x 17.78 mm, castellated edges for carrier soldering, and Arduino's Nano Connector Carrier (ASX00061) is the matching carrier.
AI context
Dense context for pasting into a model prompt — addresses, pinout, voltages, tolerances and the vendor's reference circuit.
PART: Arduino Nano R4, SKU ABX00142, 43.18 x 17.78 mm Nano-form-factor board on a Renesas R7FA4M1AB3CFM#HA0 - Arm Cortex-M4 at 48 MHz with floating point unit, 256 kB flash, 32 kB SRAM, 8 kB data flash (EEPROM), 14-bit ADC, 12-bit DAC, one operational amplifier, RTC with an external crystal, USB 2.0 full-speed and CAN (transceiver external). The board is 5 V logic throughout, keeps the classic Nano 2 x 15 pinout with castellated pads, adds a 4-pin Qwiic connector on a second I2C bus, a programmable RGB LED, a single-colour LED_BUILTIN, a reset button and an MP2322GQH buck converter on VIN. PINOUT: Arduino numbers the two headers independently - JP1 (analog side) pads 1-15 and JP2 (digital side) pads 1-15, with JP2's numbers running the opposite way - so this entry numbers JP1 1-15 and JP2 16-30 and each description names its connector and the vendor's own pad number. JP1 (1-15): D13/SCK, +3V3, AREF, A0, A1, A2, A3, A4, A5, A6, A7, 5V, BOOT, GND, VIN. JP2 in this entry's order, pads 15 down to 1 (16-30): D12/CIPO, D11/COPI, D10/CS, D9, D8, D7, D6, D5, D4, D3, D2, GND, RST, D0/RX, D1/TX. I2C: two buses and no device on either, so there are no addresses. The main bus (the Wire object) is on A4 SDA and A5 SCL at 5 V; the Qwiic connector carries the secondary bus (Wire1) on a JST-SH SM04B-SRSS-TB, powered at 3.3 V from the AP2112K-3.3TRG1 regulator and level-translated up to the RA4M1's 5 V domain. Arduino states A4 and A5 should not be used as ADC inputs while the bus is in use, and that devices may be attached to the pins and the Qwiic connector at the same time. SUPPLY: VIN accepts 6.0 V minimum, 7.0 V typical, 21.0 V maximum DC and is buck-converted to 5 V; the USB-C input accepts 4.8 V to 5.5 V (5.0 V typical) and Arduino says never to exceed 5 V there. A power-OR circuit picks between USB and the buck output automatically. The 3V3 pin is an output only - above 150 mA drawn from it Arduino warns the board may get very hot, because it is an LDO. LOGIC AND LIMITS: every header pin is 5 V logic and VDD is tied to the 5 V rail, so AREF defaults to 5 V full scale; the Qwiic connector is the only 3.3 V interface. Each GPIO handles 8 mA maximum - Arduino says never to drive more than that directly and to use a transistor or MOSFET for anything heavier. VBATT for the RTC backup accepts 1.6 V to 3.6 V and the switch-over to backup happens as VCC falls through 2.09 V typical (1.99 to 2.19 V). TRAPS: (1) the Qwiic bus is 3.3 V while the rest of the board is 5 V - a Qwiic sensor sees 3.3 V logic, and the translation is on the board, in one direction of use only. (2) Wire1 is Qwiic and Wire is A4/A5; code written for one will not find a device on the other. (3) A4/A5 are the only ADC channels wired to the main I2C bus, so a bus in use removes analogue inputs 4 and 5. (4) VIN has a 6 V minimum - a 5 V supply must go to the 5V pin or USB-C, not VIN. (5) D4 and D5 are the CAN pair and need an external transceiver; nothing on the board converts them. (6) D0/RX and D1/TX are the same UART the USB-C serial interface drives. (7) USB-C must not be fed more than 5 V, and the port is rated 500 mA. BOARD FACTS: 14 digital I/O, 8 analogue channels, operating temperature -40 to +85 C, 43.18 x 17.78 mm Nano footprint with dual castellated/through-hole pads on a 2.54 mm pitch, 1.0 mm holes, four 1.65 mm mounting holes and a single-sided component placement so it can be reflowed onto a carrier. The board is code-compatible with the UNO R4 Minima for the RA4M1 peripherals, and Arduino's own Nano Connector Carrier (ASX00061) is the matching carrier.
Provenance
Every figure on this page was read from the 3 sources below and last checked on Oct 24, 2026.
- vendor Arduino Store - Arduino Nano R4 product page (ABX00142, €13.40 as measured; RA4M1, Qwiic connector, castellated Nano footprint, single-sided components)
- datasheet Arduino Nano R4 datasheet ABX00142 (pinout tables 4.1.1 JP1 and 4.1.2 JP2, VIN 6-21 V, VUSB 4.8-5.5 V, 500 mA USB input, 8 mA GPIO limit, 5 V logic with a 3.3 V Qwiic bus, AP2112K 3.3 V LDO and the 150 mA heat warning, VBATT 1.6-3.6 V, 14-bit ADC and 12-bit DAC)
- reference Arduino Nano R4 full pinout drawing ABX00142 (the same two headers laid out on the board, with the Qwiic connector's 1-4 pin order, the RGB LED, the power LED and the reset button)