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Verified 2026-10

VS1053 Codec + MicroSD Breakout - MP3/WAV/MIDI/OGG Play + Record

A VLSI VS1053B audio codec breakout with a microSD socket, driven over SPI: it decodes MP3/AAC/Ogg/WMA/FLAC/MIDI/WAV and records PCM or Ogg from the mic/line input, runs from 3.3-5 V with its own 3.3 V and 1.8 V regulators, and buffers the host-driven inputs through a 74HC4050 so a 5 V board can drive it; 27.72 x 58.08 mm with two 16-pad 0.1in rows.

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Logic level3.3 V

Pinout

32 pads, as the vendor numbers them.

#NameFunctionSignals
1LINE2Line input, channel 2 of the codec's ADC. This is the ONLY line input on the header - the VS1053B has a LINE1 too, but Adafruit does not break it outanalog input, line in
2MIC+Microphone/line-input positive, into the codec's mic amplifieranalog input, mic in
3MIC-Microphone/line-input negativeanalog input, mic in
4AGNDAnalog ground, the reference for the audio inputs and outputsanalog ground
53V33.3 V rail from the board's own regulator - an output, not a supply input3.3 V output, regulated rail
6GPIO0Codec GPIO 0, broken out with a 100 kOhm pull-down on the board; drive it high from 3.3 V for an active-high inputGPIO, bidirectional
7GPIO1Codec GPIO 1, 100 kOhm pull-downGPIO, bidirectional
8GPIO2Codec GPIO 2, 100 kOhm pull-downGPIO, bidirectional
9GPIO3Codec GPIO 3, 100 kOhm pull-downGPIO, bidirectional
10GPIO4Codec GPIO 4, 100 kOhm pull-downGPIO, bidirectional
11GPIO5Codec GPIO 5, 100 kOhm pull-downGPIO, bidirectional
12GPIO6Codec GPIO 6, 100 kOhm pull-downGPIO, bidirectional
13GPIO7Codec GPIO 7, 100 kOhm pull-downGPIO, bidirectional
14TXMIDI/serial transmit, a direct output from the codec's UART (fab file: TX runs straight from the VS1053B to this pad). The silkscreen note at this end of the row reads 'RX/TX SERIAL: 3-5V safe'UART TX, MIDI out
15RXMIDI/serial receive into the codec's UART, brought in through a series part (D1) rather than the 6-bit shifter; boot the chip into real-time MIDI mode to read 31250 baud MIDI hereUART RX, MIDI in
16SD CDmicroSD card detect, silkscreened on two lines as 'SD' over 'CD'card detect
17ROUTRight channel audio output; on this v2-and-later board it goes through an onboard 220 uF blocking capacitor, so it can feed headphones or a line input - the silkscreen note reads 'LOUT/ROUT: 16 ohm Stereo Headphone/Line Out' and 'OK for use w/powered speakers'analog output, line out
18LOUTLeft channel audio output, same 220 uF blocking capacitoranalog output, line out
19AGNDAnalog ground for the audio outputsanalog ground
20AGNDAnalog ground, second pad in the rowanalog ground
21GNDDigital groundground
22DREQData request from the codec: it asserts this to say it can accept more SPI data, and the host must respect it rather than streaming blindly. Also a direct codec output, not a level-shifted input (fab file: DREQ runs from the VS1053B straight to this pad)SPI flow control, output
23VCCSupply input, 3.3-5 V (the silkscreen near this end reads '3.3 - 5V' and '5V SAFE'); the board regulates 3.3 V and 1.8 V from itsupply input
243V33.3 V rail from the onboard regulator - an output3.3 V output, regulated rail
25GNDDigital groundground
26MISOSPI data from the codec and the microSD card back to the host. In the fab file this pad is the codec's own 3.3 V output - the MISO net runs straight from the VS1053B to the header - so it is NOT one of the level-shifted pins and it swings 3.3 V even in a 5 V buildSPI MISO, output
27MOSISPI data from the host; 5 V safeSPI MOSI, input
28SCLKSPI clock; 5 V safeSPI SCLK, input
29RSTCodec reset, active low; 5 V safereset, input
30CSCommand chip select for the codec's SPI registers; 5 V safeSPI CS, input
31SDCSmicroSD card chip select; 5 V safeSPI CS, input
32XDCSData chip select for the codec's SDI data port; 5 V safeSPI CS, input

Buses

BusSignalsPinsVoltageNote
SPI ×1MOSI, MISO, SCLK, CS, XDCS, SDCS, DREQMOSI, MISO, SCLK, CS, XDCS, SDCS, DREQ
UART ×1TX, RXTX, RX

Power

InputVCC pad, 3.3-5 V (silkscreen '3.3 - 5V'); onboard 3.3 V and 1.8 V regulators with ferrite beads and analog filtering supply the chip. The 3V3 pads on both rows are outputs of that regulator
Input range3.3-5 V

Adafruit publishes no current draw for the board. The seller's own numbers: 27.72 x 58.08 mm; v4 added a 1 uF capacitor on the acap pin as the datasheet recommends; the Dec 2022 revision was a silkscreen re-draw only, so old and new PCBs are electrically identical. The two 220 uF capacitors at the top are the LOUT/ROUT blocking capacitors that arrived with v2 - a v1 board has them loose in the bag instead.

Notes

The vendor prints no pin numbers; the numbers here are the Eagle fab file's own pad numbers, which run 1-16 down each 1x16 header. The silk labels are pinned to that numbering by the fab file: pads 1-16 are the row that starts at 'LINE2' (facing the codec, silk 'LINE2, MIC+, MIC-, AGND, 3V3, 0-7, TX, RX, SD CD') and the other header's 1-16 start at 'ROUT' ('ROUT, LOUT, AGND, AGND, GND, DREQ, VCC, 3V3, GND, MISO, MOSI, SCLK, RST, CS, SDCS, XDCS'). Because both headers are numbered 1-16 by the vendor, the second row is offset by 16 here (17-32) so the entry has unique numbers - the offset is this file's convention, not the vendor's. Both rows are 0.1in pitch, 22.86 mm apart, and the board straddles a breadboard's centre channel. Two traps: only LINE2 is broken out (there is no LINE1 pad, even though the chip has one), and the two 3V3 pads are regulator outputs, so feeding them is wrong. The fab file Adafruit publishes is silkscreened 'v2' while the board shipped is v4; v4's only documented change is the 1 uF acap capacitor, and the pad rows in the file match the v4 product photos pad for pad. Adafruit lists the interface pins as 5 V compliant because of the 74HC4050, but the fab file shows that only the host-driven inputs go through it (MOSI, SCLK, CS, XDCS, SDCS and RST each meet the shifter on a *_5V net, with a resistor network R9 alongside) while MISO, DREQ and TX run straight from the codec and therefore swing 3.3 V - which a 5 V host reads as a valid high, but it is not a 5 V signal.

Provenance

Every figure on this page was read from the 4 sources below and last checked on Oct 18, 2026.