pimoroni MAX3243 RS232 Full Breakout with DE9-M

AI context

Dense context for pasting into a model prompt — addresses, pinout, voltages, tolerances and the vendor's reference circuit.

BOARD: Adafruit's RS-232 Full Pinout Level-Shifter Breakout, the DE-9 male variant sold as ADA6253, built around one Texas Instruments MAX3243CAI in a 28-pin SSOP. The chip is three line drivers and five line receivers with an on-board charge pump that generates the RS-232 levels from a single low-voltage rail, so all eight DE-9 signal lines cross the board with no external supply and no extra parts. Adafruit's own blurb calls it '5 input and 3 output channels of level shifting' - that is the receiver/driver split, and it is rated to 250 kbit/s with plus or minus 15 kV HBM ESD protection on the RS-232 pins and GND (3 kV on every other pin). The MAX3243 is a legacy MAX232-family part that meets TIA/EIA-232-F and ITU V.28.
ADDRESSES: none - this is a UART level shifter, not an addressed device. No I2C or SPI device sits on the board, so a bus scan finds nothing.
PINOUT: 12 pads on the 0.1 inch header JP2, numbered as the fab file numbers that header and labelled as the board prints them: 1 Vin (VCC in, chip pin 26), 2 GND, 3 DCD (receiver output, chip pin 15), 4 RX (receiver output, chip pin 16 - data arriving from the remote device), 5 TX (driver input, chip pin 13), 6 DTR (driver input, chip pin 14), 7 DSR (receiver output, chip pin 17), 8 RTS (driver input, chip pin 12), 9 CTS (receiver output, chip pin 19), 10 RI (receiver output, chip pin 18), 11 VLD (INVALID output, chip pin 21, active low: high means valid RS-232 levels are present), 12 OFF (active-low FORCEOFF input, chip pin 22, held high by a 10K pull-up). The DE-9 connector X2 is numbered 1-9 by the vendor and prints its own legend on the back of the board, so it is offset to 13-21 here: 13 = DE-9 1 DCD (RIN, chip pin 8), 14 = DE-9 2 RXI (RIN, chip pin 7), 15 = DE-9 3 TXO (DOUT, chip pin 10), 16 = DE-9 4 DTR (DOUT, chip pin 9), 17 = DE-9 5 GND, 18 = DE-9 6 DSR (RIN, chip pin 6), 19 = DE-9 7 RTS (DOUT, chip pin 11), 20 = DE-9 8 CTS (RIN, chip pin 4), 21 = DE-9 9 RING/RI (RIN, chip pin 5). The DE-9's two shield legs are mechanical and carry no net.
SUPPLY: one rail, Vin, which feeds VCC and sets the logic level - the back silkscreen reads 'Vin/Vlogic: 3.3~5VDC' and the guide says the board runs on 3.3 V power and logic. For the chip that means 3.0-3.6 V at the 3.3 V setting or 4.5-5.5 V at 5 V (absolute maximum on VCC is -0.3 to 6 V; V+ must stay under 7 V, V- above -7 V, and the V+ to V- difference under 13 V). Typical active current is 300 uA and standby 1 uA, so the board is not a load worth sizing for.
LOGIC LEVEL: VCC-referenced on the logic side - VIH 2.0 V minimum at a 3.3 V supply (2.4 V at 5 V), VIL 0.8 V maximum - and the driver and control inputs accept 0 to 5.5 V regardless, which is why TI lists 'accepts 5 V logic input with 3.3 V supply'. On the RS-232 side the receiver inputs tolerate minus 25 V to plus 25 V, the driver outputs are rated to plus or minus 13.2 V absolute maximum, and the receiver and INVALID outputs must stay between -0.3 V and VCC + 0.3 V. Never probe the DE-9 side as logic: a legal RS-232 mark is a negative voltage.
REFERENCE CIRCUIT: everything is fitted. C17 10 uF decouples VCC to GND; C2 1 uF sits on V+ to GND and C3 1 uF on V- to GND (the charge pump's storage capacitors); C1 1 uF bridges the C1+/C1- pads (chip pins 28 and 24) and C18 1 uF bridges C2+/C2- (chip pins 1 and 2). Five 10K resistors pull up to VCC: R3 on DTR, R4 on TXD, R5 on RTS, R1 on FORCEOFF and R2 on FORCEON - so the three driver inputs idle at a mark instead of floating, the chip is held out of shutdown, and auto-powerdown is disabled. TI's own figure specifies 0.1 uF for those capacitors (0.047 uF on C1 and 0.33 uF on the rest at 3.3 V plus or minus 0.3 V); the board fits 1 uF, which is larger than the datasheet's table and is what ships.
TRAPS: RX and TX are named from the DTE's point of view - header RX is the receiver OUTPUT that the remote device drives (DE-9 pin 2), and header TX is the driver INPUT that feeds DE-9 pin 3 - so crossing TX to TX on a cable is wrong. The OFF pad is the chip's active-low FORCEOFF: TI's table shuts the part down (RS-232 outputs high-Z) when it is pulled LOW, while Adafruit's guide prose says driving it high tri-states the pins; R1 holds it high at rest, so low is the shutdown direction the hardware is built around, and the two statements are recorded rather than reconciled. FORCEON is not broken out to the header - R2 ties it high, which per TI's mode table is 'normal operation with auto-powerdown disabled', so the 1 uA auto-shutdown state is unreachable unless R2 is removed. VLD is INVALID, which is active low: it reads high whenever any receiver sees a valid RS-232 level and goes low when every receiver input is unpowered or open, so it is a 'cable is live' flag and not a per-line flag. The DE-9 is wired as DTE (pin 2 receive, pin 3 transmit), so two DTE devices need a null-modem cable. The board is offered in DE-9 male and female variants on the same design; the published fab file is the female one and differs only in the D-sub.